High Performance Computing - Georgia Tech



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This course will give you solid foundations for developing, analyzing, and implementing parallel and locality-efficient algorithms. Offered at Georgia Tech as CS6220

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Approx. 4 months

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The goal of this course is to give you solid foundations for developing, analyzing, and implementing parallel and locality-efficient algorithms. This course focuses on theoretical underpinnings. To give a practical feeling for how algorithms map to and behave on real systems, we will supplement algorithmic theory with hands-on exercises on modern HPC systems, such as Cilk Plus or OpenMP on shared memory nodes, CUDA for graphics co-processors (GPUs), and MPI and PGAS models for distributed memory systems.

This course is a graduate-level introduction to scalable parallel algorithms. “Scale” really refers to two things: efficient as the problem size grows, and efficient as the system size (measured in numbers of cores or compute nodes) grows. To really scale your algorithm in both of these senses, you need to be smart about reducing asymptotic complexity the way you’ve done for sequential algorithms since CS 101; but you also need to think about reducing communication and data movement. This course is about the basic algorithmic techniques you’ll need to do so.

The techniques you’ll encounter covers the main algorithm design and analysis ideas for three major classes of machines: for multicore and many core shared memory machines, via the work-span model; for distributed memory machines like clusters and supercomputers, via network models; and for sequential or parallel machines with deep memory hierarchies (e.g., caches). You will see these techniques applied to fundamental problems, like sorting, search on trees and graphs, and linear algebra, among others. The practical aspect of this course is implementing the algorithms and techniques you’ll learn to run on real parallel and distributed systems, so you can check whether what appears to work well in theory also translates into practice. (Programming models you’ll use include Cilk Plus, OpenMP, and MPI, and possibly others.)

Why Take This Course? Prerequisites and Requirements

A “second course” in algorithms and data structures, a la Georgia Tech’s CS 3510-B or Udacity’s Intro to Algorithms

For the programming assignments, programming experience in a “low- level” “high-level” language like C or C++

Experience using command line interfaces in *nix environments (e.g., Unix, Linux)

Course readiness survey. You should feel comfortable answering questions like those found in the Readiness Survey Course, HPC-0

See the Technology Requirements for using Udacity.


The course topics are centered on three different ideas or extensions to the usual serial RAM model you encounter in CS 101. Recall that a serial RAM assumes a sequential or serial processor connected to a main memory.

  • Unit 1: The work-span or dynamic multithreading model

In this model, the idea is that there are multiple processors connected to the main memory. Since they can all “see” the same memory, the processors can coordinate and communicate via reads and writes to that “shared” memory.

Sub-topics include:

** Intro to the basic algorithmic model ** Intro to OpenMP, a practical programming model ** Comparison-based sorting algorithms ** Scans and linked list algorithms ** Tree algorithms ** Graph algorithms, e.g., breadth-first search

  • Unit 2: Distributed memory or network models

In this model, the idea is that there is not one serial RAM, but many serial RAMs connected by a network. In this model, each serial RAM’s memory is private to the other RAMs; consequently, the processors must coordinate and communicate by sending and receiving messages.

Sub-topics include:

** The basic algorithmic model ** Intro to the Message Passing Interface, a practical programming model ** Reasoning about the effects of network topology ** Dense linear algebra ** Sorting ** Sparse graph algorithms ** Graph partitioning

  • Unit 3: Two-level memory or I/O models

In this model, we return to a serial RAM, but instead of having only a processor connected to a main memory, there is a smaller but faster scratchpad memory in between the two. The algorithmic question here is how to use the scratchpad effectively, in order to minimize costly data transfers from main memory.

Sub-topics include:

** Basic models ** Efficiency metrics, including “emerging” metrics like energy and power ** I/O-aware algorithms ** Cache-oblivious algorithms