INTEGRATED CIRCUITS FOR SIGNAL PROCESSING

Definition of basic figure of merits for analog circuits: noise floor, dynamic range, dependence on process parameters spread and sensitivity. Effects of non-linearities in active circuits: power series approximation, harmonic distortion, intermodulation products. Figure of merits related to the non linear behavior: HD, THD, IM. Desensitization of a receiver front-end and two-tone test.
Approximation methods to synthesize an analog filter with a given transfer function. Realization of a second-order filter (biquad) using a cascade of integrators. Efficient implementation of the integrator using an integrated CMOS technology: MOSFFET-C and Gm-C. Effects of the main circuit non-idealities: finite gain and bandwidth, equivalent non-linear resistance of the MOS transistor, sensitivity to process parameters spread.
Switched-capacitor filters. The concept of a switched capacitor. Switched capacitor integrator and its sensitivity to parasitic capacitors. Effects of the main circuit non-idealities: finite gain and bandwidth and slew rate of the OTA, parasitic resistance and capacitors of the MOS switches, thermal and Flicker noise.
Analog-to-digital converters. Definition and characterization of quantization noise. Converters figure of merits: SNR, SNDR, THD, DR, INL, and DNL.
Flash converters: architecture, circuit realization of the comparators considering gain and bandwidth limitations and DC offset.
Pipeline converters. Multistep conversion concept and pipelining. Circuit realization of the basic stage. Effects on the global converter of gain errors, mismatch and comparator offset. Calibration techniques.
Sigma-Delta converters. Oversampling and noise-shaping concepts. Sigma-Delta architectures and trade-off between order, oversampling ratio and number of bits on the internal quantizer. Effects of the main circuit non-idealities (finite gain and bandwidth, thermal noise) and power-efficient design criteria. Mash architectures. Introduction to the decimation filter.
Frequency synthesizers. Introduction to typical RF receivers. Phase locked-loop (PLL): introduction and analysis in the lock state. Trade-off between bandwidth and precision: type-I and type-II PLL. Examples of circuit realization of a PLL. Main noise source in a PLL and optimal choice of the loop bandwidth in order to reject the oscillator phase noise. Integer N PLL. Introduction to fractional PLL with sigma-delta modulation.